1. Technical Field
The present disclosure relates to a control device for a switching converter.
2. Description of the Related Art
Switching converters, such as for example buck converters, using a Pulse Width Modulation (PWM) control scheme operating at a fixed frequency are presently used; this is mainly due to the noise immunity of the type of control, to the stability and to the fact that, in the type of control, the switching noise may be filtered. Converters having a PWM control operating at a fixed frequency have, however, a response to load transients, i.e., when the current required by the load suddenly varies, which is less efficient as compared to hysteresis converters.
At present, there exist circuit solutions in which the controllers of switching converters normally use a linear control operating at a fixed frequency but, in case of heavy load transients, they use a hysteresis control. The types of converters have, however, an unstable behavior or require a precise calibration in order to achieve an acceptable behavior.
FIG. 1 shows a buck converter in accordance with the known art. The converter includes a half-bridge 1 of MOS transistors M1 and M2 supplied by an input voltage Vin and connected to ground GND. The half-bridge is connected to an array of an inductance L and a capacitor C connected between the middle point of half-bridge 1, the terminal shared by transistors M1 and M2, and the ground GND. At the ends of capacitor C, there is the output voltage Vout which is also the voltage on the load LD. The voltage is sent to an error amplifier 2 adapted to compare voltage Vout with voltage Vref and to amplify the difference between the two voltages; the error amplifier includes a filter to improve accuracy and stability. The Voltage Er outputted from the error amplifier 2 is compared, by means of a comparator 3, with a saw-tooth voltage Vseg operating at a fixed frequency generated by an oscillator 4; the output signal at the comparator 3 is a square wave Vpwmpa operating at a fixed frequency and variable duty cycle. The signal is inputted to a driver 5 which is adapted to drive the MOS transistors M1 and M2 by means of the signals P1 and P2.
The main disadvantage of PWM controllers operating at a fixed frequency is the long response time.
If the converter load requires a high current Iload during the turning-off time Toff, the current is supplied by the output capacitor C, thus causing its discharge, until the control loop reacts thus increasing the current I1 into the inducer L during the turning-on time Ton; FIGS. 2a-2c show the charge Cg lost by capacitor C when increasing the current Iload and the corresponding droop of voltage Vout. In order to keep the control loop stable, the bandwidth of the loop must be less than about ¼ of the switching frequency, thus causing a slower response.
One suggested solution consists in forcing the turning-on of the PWM controller when the output voltage goes down a threshold voltage and in forcing its turning-off when the output voltage goes up another threshold voltage. This type of solution presents however some drawbacks: the method may not be used when a droop function is required as the output voltage must change upon load variations; if capacitor C has a low equivalent resistance or ESR, the control method appears to be unstable; the PWM frequency may uncontrollably increase if repeated high frequency transients occur, thus causing MOSs to overheat.